Honored ContributorDear Host,
I am designing Cyclone III EP3C120 Board. On this board, i am configuring FPGA with AP configuration. In this configuration, i am using Micron P33 Parallel NOR Flash Memory.I will program the configuration through JTAG interfacing. For VCCIO banks 1,6,7 and 8, i will use 3.3V. Please provide additional information, if necessary. Regards, Mohsin Hayat
Honored ContributorIt sounds like you're following the 'AP Configuration' section of the Cyclone III handbook. All the detail you need is in there. I'm not sure we can be expected to "provide additional information" here as well.
Follow the design guidelines and you'll be fine. If you have specific questions ask them here. Cheers, AlexHonored ContributorI have one question about Passive Parallel Configuration......Is it possible we use NIOSII Processor and Cyclone III to interface with external Flash Memory without using CPLDs?
Honored ContributorYes. You can use the same parallel FLASH device to both boot your device and then run your Nios from. You don't need a CPLD.
Cheers, AlexHonored ContributorOh realli? Please give me Altera Reference Or Any design example? i m realli worried about that. I study alot of time the Altera Configuration Book, volume 1 and 2.But i cann't find. Please give me design example.
Honored ContributorThat should be Cyclone III handbook right?
Honored Contributoryes its in Cyclone III handbook but in detail in "Altera Configuration Handbook , Volume 1 & 2".
Honored ContributorDear Host,
Please respond on my query urgently. i am stuck on this point.Honored ContributorProviding you follow the guidelines in the "AP Configuration (Supported Flash Memories)" section - page 9-23 - of the "configuration, design security, and remote system upgrades in the cyclone iii device family (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyc3/cyc3_ciii51016.pdf)" chapter of the handbook Volume 1, specifically Figure 9-8, you will be able to use that parallel FLASH device with your Nios II processor.
Cheers, AlexHonored ContributorThanks sir for sharing this point.Its cleared to me regarding AP Configuration.
I have last point about the configuration now. In Passive Serial Configuration, Is it possible to use supported flash memories with NIOS II Processor? If possible then ...we connect flash to dedicated pins of FPGA r any I/Os can be used?Honored ContributorFor PS Configuration, please see the page 9-34, "Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family" chapter of the handbook Volume 1.
