Configuration Failure | nSTATUS low, JTAG Chain Alive, AS Active Serial

An X-Ray of the pads of the FPGA failed to reveal any shorts. This left me rechecking the power rails for proper voltage and configuration pins to ensure they were properly handled.

The next action that was taken was to replace the FPGA. Surprise, surprise, the FPGA immediately configured using “Active Serial Mode” and the image from the EEPROM I had already programmed before I sent the board out. Either a solder short that was not seen by the x-ray was holding it in reset or the FPGA was damaged. Now I am curious if I could have just reflowed the FPGA and if a solder short was the actual problem rather then replacing the entire FPGA (after all JTAG was operational to perform a boundary scan, JTAG configruation would fail before the replacement).