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Altera_Forum's avatar
Altera_Forum
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12 years ago

Compatibility of compiled design.

Hi, I want to know if it is possible and save to use a Design compiled for a FPGA with commercial Temperature-Range and lower Speed-Grade in a FPGA with industrial Temperature-Range and lower S...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

As long as you have correctly constrained your design there won't be any problems. Timequest always use the delays of the fastest variant of the FPGA for hold requirements, even when you compile the design for a slower part, so the design will always work on a faster FPGA that what it was compiled for.