communication ethernet between two FPGAs

you setup the heap ram in the system properties page. I think its not a problem of full featured or not you are facing. And syslib is maze, but there is no reason it should not work in your project, when it works in socket_server.

Compare the system proporties from socket_server with your problem projects ditto.

You can get a description of how to generate a linker map here: http://forum.niosforum.com/forum/index.php?showtopic=312.

Make a search in the forum and you will find a lot of information, but in fact I prefer to use google. Just include "nios forum" in your search key. By the way, your problem is more related to niosforum.com than to this here.