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Altera_Forum's avatar
Altera_Forum
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19 years ago

communication ethernet between two FPGAs

Hi to all, I'm a new member of this forum, which, I'm sure, will be very usefull for my problem. So, I'm working with two Cyclon II fpga connected each other by the ethernet cable and I'm tryi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

you setup the heap ram in the system properties page. I think its not a problem of full featured or not you are facing. And syslib is maze, but there is no reason it should not work in your project, when it works in socket_server.

Compare the system proporties from socket_server with your problem projects ditto.

You can get a description of how to generate a linker map here: http://forum.niosforum.com/forum/index.php?showtopic=312.

Make a search in the forum and you will find a lot of information, but in fact I prefer to use google. Just include "nios forum" in your search key. By the way, your problem is more related to niosforum.com than to this here.