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Altera_Forum's avatar
Altera_Forum
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13 years ago

Communicate over the JTAG to the MAX II

Hello,

I own the Stratix V GX development board, and I want to reconfigure the tranceiver clocks. I must read/write registers of Si570 device through the MAX II CPLD.

Could someone tell me how to communicate over the JTAG to the MAX II?

With FPGA, I can do it with Tcl command in System Console if I put "JTAG to Avalon Master Bridge" in Qsys, but the Qsys system of the CPLD has a Virtual JTAG component (with I2C component) instead.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    I own the Stratix V GX development board, and I want to reconfigure the tranceiver clocks. I must read/write registers of Si570 device through the MAX II CPLD.

    Could someone tell me how to communicate over the JTAG to the MAX II?

    With FPGA, I can do it with Tcl command in System Console if I put "JTAG to Avalon Master Bridge" in Qsys, but the Qsys system of the CPLD has a Virtual JTAG component (with I2C component) instead.

    --- Quote End ---

    Is their use of the Virtual JTAG interface documented?

    In the zip file for this tutorial:

    http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

    Is a set of Tcl commands for quartus_stp. The commands can be used to list the configuration of the Virtual JTAG interface on the MAX II. From that, you should be able to issue the commands necessary to change the clock.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    Thanks for your help.

    --- Quote Start ---

    Is their use of the Virtual JTAG interface documented?

    --- Quote End ---

    Not realy. I found the source project, without informations, but I saw how it encodes/decodes IR number. Worse, their PDF didn't give addresse of the device connected to the MAX II CPLD... Except at one location in the schematic of the board, an address is beside each reconfigurable oscillator.

    --- Quote Start ---

    In the zip file for this tutorial:

    http://www.alterawiki.com/wiki/using...aster_tutorial (http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial)

    Is a set of Tcl commands for quartus_stp. The commands can be used to list the configuration of the Virtual JTAG interface on the MAX II. From that, you should be able to issue the commands necessary to change the clock.

    --- Quote End ---

    I knew the tcl command for quartus_stp but I can't use it in System Console unless I can add the package "jtag" of quartus_stp in System Console but I don't know how to do.

    Anyway some Tcl commands from quartus_stp are the same as SLD Commands. I tried the following code in System Console with a bad result:

    
    set vj  2]
    open_service sld $vj
    sld_access_ir $vj 2 1000
    sld_access_dr $vj 8 1000 0x66
    sld_access_ir $vj 1 1000
    sld_access_dr $vj 8 1000 0x09
    
    0x66 is the address of the device with which I want to communicate.

    9 is the register number indicated by the device designer, which i want to read first.

    Which errors did I do in this code?
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    Except at one location in the schematic of the board, an address is beside each reconfigurable oscillator.

    --- Quote End ---

    That would be their I2C address probably, not their MAX II address. The MAX II block diagram shows a "Si570 Controller" which can mean anything, eg., a simple PIO block or an I2C controller. Without knowing the address map of that component you cannot program it.

    --- Quote Start ---

    I knew the tcl command for quartus_stp but I can't use it in System Console unless I can add the package "jtag" of quartus_stp in System Console but I don't know how to do.

    --- Quote End ---

    The script is specific to quartus_stp.

    --- Quote Start ---

    Anyway some Tcl commands from quartus_stp are the same as SLD Commands. I tried the following code in System Console with a bad result:

    --- Quote End ---

    No, they're not quite. In the script I wrote are the commands used to interrogate the nodes on the Virtual JTAG interface.

    --- Quote Start ---

    
    set vj  2]
    open_service sld $vj
    sld_access_ir $vj 2 1000
    sld_access_dr $vj 8 1000 0x66
    sld_access_ir $vj 1 1000
    sld_access_dr $vj 8 1000 0x09
    
    0x66 is the address of the device with which I want to communicate.

    9 is the register number indicated by the device designer, which i want to read first.

    Which errors did I do in this code?

    --- Quote End ---

    I doubt this is the correct code.

    You need to extract the max2 design located in the examples folder and then review the code. That should provide the information you are missing. You need to know how to program the MAX II controller so that it generates I2C commands to the Si570 device.

    A simpler method would be to install the same version of Quartus as the kit distribution and then use their clock control GUI. For example, it looks like there is an 11.1 version on the site now

    http://www.altera.com/products/devkits/altera/kit-siv-gx.html

    If you are running 12.x already and do not want to install an earlier version, then you can install VirtualBox and install an OS (Windows or Linux) and install the older version of Quartus there.

    So long as the host is running Windos XP or Linux, then you can connect the USB-Blaster to the Virtual Machine (Windows 7 does not allow this for some reason). You can then use the clock control GUI from within the VM.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    The Si570 component communicates by I2C with MAX II CPLD.

    But I didn't find any addresses map of MAX II for my board...

    Thanks for your informations and advises.

    I think you give me all I need to accomplish my project.

    I will give news if I succeed!

    Best regards