Combinational logic question on EPM3128A

Hello.

I connect DSP's read and write signal RW (when read it is high), low 3 address lines (A2, A1, A0) and page selection signal PAGE3 to EPM3128A, EPM3128A output signal PNIWE:

assign PNIWE = ~(~RW & (AL==3'b010) & ~PAGE3);

When DSP writes to address 0xC00002 (interrupt is disabled), PNIWE signal should be output low pulse. ( CPLD also provide chip select CS and read signal RD for one AD chip, AD chip is read in the timer interrupt process )

But in practice, when AD chip is read in the timer interrupt process, CPLD sometimes does not produce low pulse PNIWE when I write to address 0xC00002 ( in main process, not in interrupt process), when AD chip is not read it works fine.

what may be due to the cause of it?

Thanks.