Forum Discussion
Cold Temperature Issue
Hi dpcsu,
Thanks for your reply
Our voltage rail sequence is VID, 08V -> 1.8V -> 1.2V, 3.3 VCCIO
We detect the POR issue because we don't see any signal transitions after power up (nStatus, PMBus), JTAG detect the device.
How did you read the SDM ROM?
Any way we repeat the test with other PCB and it pass successfully, so we examine if it specific PCB issue.
regards
Asaf
Hello Asaf, Peter,
Do you have update?
regards,
Farabi
- dpcsu_e30 days ago
New Contributor
Hi Farabi, in our case it was 1.8V ramping up faster than 200us, adjusting softstart capacitor solved it.
- Farabi_Altera30 days ago
Regular Contributor
Hi Peter,
Noted. Good to hear you solved the issue, I will close this case.
regards,
Farabi
- Asaf_Bloch22 days ago
New Contributor
Hello Farabi,
After re-heating the FPGA at assembly house, we run cold power-up again and the issue still exist,
I do not see nSTATUS rising after nCONFIG rising.
Do you have any advise what to check?
Thanks
Asaf
- Farabi_Altera21 days ago
Regular Contributor
Hi Asaf,
Before reheating the FPGA at assembly house - power up successful
After reheating the FPGA at assembly house - power up fail
Is above statement correct?
My question :
1- How many boards fail? how many boards pass?
2- what is the purpose of re-heating at assembly house?
3- Is it possible to check solder cracks using xray?
4- nSTATUS not rising meaning device not starting configuration- still in reset mode. Can you check power rails are stable?
VCC, VCCIO_SDM etc
regards,
Farabi
- Farabi_Altera16 days ago
Regular Contributor
Hello Asaf,
Can you reply?
regards,
Farabi - Farabi_Altera15 days ago
Regular Contributor
Hello Asaf,
As there is no response. Please let me set this case to close.
regards,
Farabi- Asaf_Bloch8 days ago
New Contributor
Hello Farabi,
Sorry for the late respond, I am on vacation, back to work next week,
Any way as I understand from my colleagues, the cold start issue happened again on other system so please don’t close this case
Thanks
Asaf