Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

code is simple, error is hard to understand

excuse me, i m a beginner, so the question may be meaningless. I SIMPLY WROTE MY CODE LIKE: process(a_in , clk) begin if clk'event and clk='1' then c_out<=a_in; else c_ou...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

The way you have written the code that gives the error, you are asking the synthesisor to produce a circuit that registers a_in for the really tiny amount of time that encompasses the rising edge. As soon as the clock is at '1', you're trying to force the output to '0'.

You should never put an else case on a clock if. And you should never assign a signal inside and outside the clock branch.