CMOS General Input Output (IO) pin speed specification of cyclone IV

Refer to chapter 1 of the 'Cyclone IV Device Datasheet':

http://www.altera.co.uk/literature/hb/cyclone-iv/cyiv-53001.pdf (http://www.altera.co.uk/literature/hb/cyclone-iv/cyiv-53001.pdf)

Look at the 'Core Performance Specifications' section. This section details the maximum frequency that various devices and speed grade combinations will operate at.

Also look at the 'PLL Specifications' that immediately follows the above section. This identifies the maximum input clock frequency that the PLL can operate at for various speed grades. These figures are not the same as the those stated in the Core Performance Specifications. Both tables should help guide you as to what to expect.

However, I will say again that, the maximum clock frequency that the device will operate at will be dominated by your logic and how you've designed it. Code something, constrain it and use the tools to tell you exactly what clock frequency your design will run at. This is by far and away the best way to determine what frequency your chosen part, with your design, will operate at.

Regards,

Alex