Altera_ForumHonored Contributor8 years agoclock problem on De0 nano board (schematics file) hello, i don't have seen the same problem with a good solution, so i ask here, I try to do a counter which is suposed to count to ten at 1Hz but i have a warning i can't solve alone, ...Show Moreschematics problem.png10 KB
Recent DiscussionsFeasibility to implement 350MHz LVDS + soft-CDR on Cyclone 10LPQuestionWill serialization factor of 6 in LVDS serdes IP be supported in the future on Agilex5?1.8 V LVDS Receiver Timing Specifications for Intel MAX 10 Dual Supply DevicesSolvedAvalon-ST configuration with Agilex 3 fails