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Altera_Forum
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15 years ago

clock domain crossing between two PLLs (cyclone III)

hello! I use two PLLs in my design. One is reconfigurable and the the other one is not. If I use both PLLs to control one single circuit I always get trouble. (Example: The reconfigurable PLL gene...
Altera_Forum's avatar
Altera_Forum
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15 years ago

The latest after reconfiguring one PLL or setting diiferent frequencies, the clocks can't be synchronous any more. But individual binary signals can be easily synchronized by two DFFs, multi bit signals are more difficult, needing handshake synchronization or domain crossing FIFOs.