Forum Discussion
gyuunyuu
Contributor
5 years agoclkp and clkn inputs in Intel FPGAs
The clkp and clkn can be used to insert a differential clock signal into the FPGA. My question is, can we have 2 separate independent single ended clock signals being input into the FPGA on these two...
Ash_R_Altera
Regular Contributor
5 years agoGCLK networks are capable driving the entire device. Please refer below documentations:
MAX 10 GCLK network:
Cyclone 10 LP GCLK network:
Regards.