Hi,
All inputs should be connected and their logic identified. If it still doesn't work then you ned to check your core itself.
clk=>clk, --ok
clken=>'1', --ok
reset_n=>reset_n, -- make sure this signal goes high for operation
in_data=>x"0F", -- how is this accepted by compiler?? 8 to 32 bits
in_valid=>in_valid, -- may be this => '1' will do for now
out_ready=>out_ready, -- define this logic e.g. =>'1'
in_error=>in_error, -- define this logic
out_data=>out_data,
in_ready=>in_ready,
out_valid=>out_valid,
out_error=>out_error
kaz