Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorChoosing Cyclone IV device/speed grade
Hi all, I have been developing a system on a DE0-NANO development board (which has a speed grade 6 device) and am now ready to move the design onto a purpose built PCB. My current HDL design...
Altera_ForumHonored Contributor
Honored ContributorI have not worked with SPI previously, but I guess it shouldn't be too different from the ones below:
http://www.alterawiki.com/wiki/timing_constraints Constrain SPI core example: http://www.alterawiki.com/wiki/constrain_spi_core Regarding your .sdc file, I believe it is sufficient for the clocks within the system. I would be interested to hear from other developers on this forum as well :)
