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Honored Contributor
Honored ContributorChoosing a FPGA
Hi, I am using a FPGA with a DDS board (AD9910). The DDS board has a parallel port where I can send a 16bit word every clock pulse. The DDS parallel port can latch onto data every 4ns. So far I ha...
Altera_ForumHonored Contributor
Honored ContributorYou could try using on-chip memory instead of SDRAM to improve speed. M9K Blocks max speed is 315 MHz but more can be achieved using LEs.
With Cyclone V MLAB you can reach 420 MHz but Cyc IV should be enough if you don't have a lot of logic between DDS port and memory.
