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Altera_Forum
Honored Contributor
Honored ContributorChecking FPGA for LE damage
Hello, We have a good reason to believe that an ACEX 1K FPGA on one of our board has some physical damage, i.e. some malfunctioning logic elements. Is there any standard way to test this ? I ca...
Altera_ForumHonored Contributor
Honored ContributorDaniel, I agree with you mostly. It is possible but much less likely to have a die defect, however this should be caught by production flow testing prior to shipping the device.
Eliben, I agree the liklihood is a design issue. Check your P's and Q's then if all checks out file an SR so Altera can help you evaluate further as needed.
