Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Checking configuration bitstream integrity (Cyclone IV)

I believe the configuration bitstream contains checksums or similar which the target FPGA checks for errors or corruption. Are the details of this integrity checking published? I'd like to have a hos...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hi Dave! Thanks for the quick reply!

Well, I will find a way to validate the configuration.

Maybe doing the FPGA return a clock signal when in user mode.