Changing the speedgrade

(Note that the speed grades don't refer to ns anymore, they're just relative indicators of performance).

Without timing constraints, how did/do you know the design works in a -6? If it's a valid test, then do the same test on the -8. If it wasn't a valid test, then you don't know about either.

Learning how to do core timing is pretty easy. Take a look at the TimeQuest User Guide I have on alterawiki, and the first chapter is a Getting Started. The I/O constraints are more difficult and take time, but also one of the things that is often likely to fail.