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Altera_Forum
Honored Contributor
Honored ContributorChanging the HPS SDRAM PLL clock source from QSys
Hello everyone, I'm in the early phases of design for a new board that will use a Cyclone V SE. I'm currently planning my clock domains for the HPS part and I see in several places in the Cyclo...
Altera_ForumHonored Contributor
Honored ContributorWhile we are on this issue, perhaps you can file a service request to Altera to request for this feature to be made available.
