Change VHDL generic via command line for synthesis

Hi,

then how should I make the pin assignments for the pins not used when generic = 0 (they're only used when generic = 1). Is there a way to set them 'conditionally' in the qsf file ?

For above mentioned can't be achieved in .qsf, you may need to use .tcl script if/then/else already as mentioned. For example like below in .tcl:

set a [get_parameter -name C3_CNT]

if {$a == 1} {

set disable 0

set enable 1

} else {

set enable 0

set disable 1

}

if {$enable} {

set_location_assignment PIN_W28 -to outclk6 -disable -comment IOBANK_3C -remove

set_location_assignment PIN_W28 -to outclk6 -comment IOBANK_3C

export_assignments

}

if {$disable} {

set_location_assignment PIN_W28 -to outclk6 -disable -comment IOBANK_3C

export_assignments

}

Remember that if want to enable, make sure source the .tcl twice in order to remove the previous -disable assignment.

[Take Note This]: Critical Warning(19941): QSF command 'set_parameter' can only apply to the top-level design and cannot include '-to' or '-entity' arguments.

If you notice that 'set_parameter' doesn't take effect, remove the '-to' or '-entity' arguments because it can only apply to top-level design.

Thanks,

Best Regards,

Sheng