Change path name in qsf to sdc

Hi,

yes , I use "derive_pll_clocks -create_base_clocks" in sdc.

popurse of using is Mega_wizard setting reflect automaticaly in sdc.

I hesitated to use "create_generated_clock".

and,I want to change more readable any signal in sdc.

example is

//**********************************************************************

1.

set_multicycle_path -end -setup -from

[get_keepers {average_calc:average_calc|r_avr_data

[*]}] -to

[get_keepers {average_calc:average_calc|r_mul_data

[*]}] 2

2.

set_output_delay -max 2 -clock pll|altpll_component|pll|clk[1] [get_ports out_data

[*]]

//**********************************************************************

How can I make shorter "average_calc:average_calc|r_avr_data

[*]"

and "pll|altpll_component|pll|clk[1]"?