Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorChange bus width with a FIFO
Hello, I have a data source of 64bit @ 156.25Mhz and wish to convert this to 32bit @ 312.5Mhz. I create a Dual Clock FIFO with different widths, invert the 'rdempty' signal and attach it t...
Altera_ForumHonored Contributor
Honored ContributorMaybe not a direct answer to your question but have you considered just using a 64-bit latch with a 32-bit mux rather than a fifo? As long as your data-rate is the same you should be able to pull the data out fast enough before the slower clock writes the next 64-bit word..
-Mux
