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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Cfi S29al032d

Hello,

I am working on a DE1 starter kit.

I want to use the CFI with SOPC. I have quartus II 6.1 and NIOS2 6.1.

Here you can find my project with SOPC :

http://img27.imageshack.us/img27/4353/sopc.th.png (http://img27.imageshack.us/my.php?image=sopc.png)

Here you can find a part of my top level whit the links between the CFI and my SOPC.

http://img413.imageshack.us/img413/6960/routage.th.png (http://img413.imageshack.us/my.php?image=routage.png)

But I have a problem with NIOS2 when i try to run my program or when i try to flash my CFI, I have this kind of message:


Using cable "USB-Blaster ", device 1, instance 0x00
Pausing target processor: OK
Reading System ID at address 0x00405130: verified
Initializing CPU cache (if present)
OK
Downloading 00000000 ( 0%)
Downloaded 10KB in 0.1s        
Verifying 00000000 ( 0%)
Verify failed between address 0x0 and 0x2787
Leaving target processor paused
I have read a lot of advice on this forum:
  • to check my reset address

  • to check my execption address
http://img54.imageshack.us/img54/5459/exeption.th.png (http://img54.imageshack.us/my.php?image=exeption.png)

but now i have no idea.

I don't understand.

On my design the reset is on the vcc, is it correct?

i set the setup and hold time of the CFI at 70ns. Is-it correct?

Please help me :(

Jerome

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    In your QSYS (SOPC) tool you might have besides flash memory on-chip memory. In setting of the Nios2 set both vectors to that on-chip memory. Than build QSYS, compile design and program the FPGA. After that create a project in Eclipse. Than open Eclipse>NiosII>BSP_editor and open the bsp file stored in your project. In BSP editor click on the Linker script, than in Linker region name change value from flash memory to on-chip memory, generate and save.

    I've fix this problem this way.