Cascading CPLDs on different PCBs

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You don't. Each CPLD synchronizes the serial data to its own clock domain. The I/Os would update on the rising-edge of the shift clock, as detected in the synchronized domain (within a couple of clocks of each oscillator), or you can use the serial clock to update it.

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Ah, so each daughter-board as it's own oscillator. I think I'll go with an oscillator then.

But if feeding the clock to just one pin is ok, why does the CPLD have as much as 4 dedicated pins for the clock? Not that I'm complaining, just want to know.