Forum Discussion
Hi Fakhrul,
thank you for your support.
However, the tutorial you suggested (https://www.intel.com/content/www/us/en/design-example/714441/max-10-adc-example-for-use-with-board-test-system-monitor-panel.html) is not what I am looking for.
I do not want to test the ADC with the monitor panel.
I want to see in Questa the waveforms shown at minute 3:06 of the video tutorial:
https://www.youtube.com/watch?v=6UscboZ1Vho
So I am only interested in the ADC core simulation with Questa.
I attached a project where I tried to replicate the ADC waveforms in Questa, but both the vhdl and verilog ADC model doesn't work.
This is the project I attached:
I have issues with the vhdl or verilog model of the ADC core, I don't know why it doesn't work in simulation.
If you can help to make the hdl ADC core simulation model work thank you very much.
Kind regards, Roberto.