Can't simulate ADC as shown in the tutorial

Hello Farabi,

I explained myself not clearly.

Chapter 2.5 of the document you suggest doesn't add anything new to the tutorial described in https://www.youtube.com/watch?v=6UscboZ1Vho

My problem is with the ADC simulation IP Core generated automatically by Quartus. Questa is not able to simulate the ADC IP core, and I don't know why. Probably I need to check https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-software/user-guides.html#mwh1409960615330

However, it seems to me very strange that is not provided an updated tutorial video about the simulation of the Altera Modular ADC IP, with details about ADC simulation model and testbench generation and compilation.

My humble suggestion is to provide a new, more detailed version, of the video tutorial about ADC IP simulation.

If I will be able to simulate it in the future I'll do it for you ;-).