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Hi Nyosof,
Thanks for your answer.
I should add one more context : the epcs flash used is Cypress Spansion FL064PIF with SPI interface.
I did a few more investigation into the problem, here is what I got:
- I continued testing the first "bug" board
1.1 I tried msel(3 downto 0) = "1011" and "1101" and "1001" and "1010", nothing changed, still can't program the .jic, but .sof could be programmed.
1.2 I tried mesuring VCC, SCLK , CSn, SI and SO of the EPCS chip, it seems at board powering up, the fpga tried to send command to the Flash via SPI, I haven't yet investigated into the detail of those commands.
2. I changed to another "good" board. and I find the reason of BUG.
2.1 I re-programmed several times the new "good" board with old "good" .sof and .jic, all good.
2.2 I then found that I forgot to add the .sdc file in my "bug" project. So I add it and re-compile the project, re-programmed with the .sof and .jic, all good.
2.3 I then re-programmed this board with the "BUG" .jic, and like the first board, this board can't access to the Flash any more, but this time I can re-program the Flash, but when I power down and up the board, the fpga can't be configured by the Flash..
Due to my stupid tests, I now have two valuable boards non functionnal...
I wonder if my .jic wothout .sdc has destroyed the FPGA? but I can still program the .sof to fpga... i think i'm running into a situation super complicated...
Hope you can give me some advices.
Thanks very much.
Nooraini ,
We are having the same issue, and cannot use the method you suggested to erase the flash, as it still complains about the device ID. Also when we generated the JIC we tell it to disable ID checking!