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Altera_Forum's avatar
Altera_Forum
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14 years ago

can't find the reason Stratix IV GX short-circuited between VCC and GND

hello everyone:

i have some questions about Stratix IV GX

the first time we configurate the FPGA in jtag, it's display configurate failed at 90%。We check the pcb and find that three pull-up resistor is not at where it would be，but it all about Fast-AS configuration。

the second time we configurate the FPGA in jtag after we add the three pull-up resistor,but find the jtag can't connect . that time we check the pcb,find the Vccpt and GND is short-circuited .

In my opinion,the operation of us is not have any damage to FPGA. So i can't find the reason of short-circuited between Vccpt and GND .

And what i want to konw is the reason make the Vccpt and GND short-circuited during the operation.maybe there is somthing we missed or somthing we don't noticed.thanks

PS:the first time we configurate in jtag,we check and find that all of the VCC of FPGA is right.

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    According to the handbook, VCCPT is one of the supplies monitored by the power-on reset circuit. If it is not powered, then your FPGA will not exit POR, so any JTAG accesses will fail.

    Try to determine if the power supply is bad. For example, ideally the supply was designed with a ferrite bead on its output. Remove that bead and see if the supply comes up ok. If it does, then you have to determine why it fails with the FPGA as a load. Have you rated the supply correctly, i.e., can it deliver enough current?

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Does your board allow to detect easily if it's actually a VCCPT short or a PCB respectively solder short? Also a broken bypass MLCC or tantal cap should be considered.

    If the short is actually inside the FPGA, a serious violation of maximum ratings for VCCPT would be the most likely explanation.

    By the way, could you clearly detect a short? Core voltage supplies may have low resistance in unpowered state and also show considerable start-up currents in some cases. I'm not sure for Stratix IV, please check the handbook thorougly. It may be also a case of insufficient power delivery of your VCCPT supply.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    thanks Dave

    the power supply we are using is PTH05010w,and the output current is morethan 6A.so it is enough to driver.

    i remove the bead,and find it is ok about the power supply.the output voltage is 1.496V. Both Vccpt and Vccio (BANK7 and BANK8) is using the same PTH0510w,but there is nothing wrong of Vccio (BANK7 and BANK8) .

    what i can't understand is Vccio(BANK7 and BANK8) is ok, whlie Vccpt is short-circuited with GND, if there is something wrong of the power supply(PTH0510w).

    And what i want to know is if there is something wrong about the FPGA itself,before the first configuration.it's so expensive,and should not be so fragile.

    thanks again

    flzhn
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    Does your board allow to detect easily if it's actually a VCCPT short or a PCB respectively solder short? Also a broken bypass MLCC or tantal cap should be considered.

    If the short is actually inside the FPGA, a serious violation of maximum ratings for VCCPT would be the most likely explanation.

    By the way, could you clearly detect a short? Core voltage supplies may have low resistance in unpowered state and also show considerable start-up currents in some cases. I'm not sure for Stratix IV, please check the handbook thorougly. It may be also a case of insufficient power delivery of your VCCPT supply.

    --- Quote End ---

    thanks for reply

    we take the FPGA off of the PCB board yesterday ,and test the FPGA,and found it is only 1ohm between VCCPT and GND.

    i know some power pin have low resistance with GND ,just like Core voltage which is only 2ohm. But VCCPT is not like that if it is ok.

    Maybe something wrong with the power supply (PTH05010w),but it's ok when we test it .VCCIO (bank 7\8) of this FPGA also connect to the same power supply,but it's ok.And the resistance between VCCIO and GND is normol.

    So i want to know if there is something wrong about the FPGA itself,before the first configuration.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    VCCPT has an abolute maximum of 1.8V while VCCIO has 3.9V. So it's possible that a supply surge damages VCCPT and doesn't affect VCCIO. But's that's just a guess. Besides checking your design thoroughly, you should definitely ask Altera for their suggestions.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    --- Quote Start ---

    i remove the bead,and find it is ok about the power supply.the output voltage is 1.496V. Both Vccpt and Vccio (BANK7 and BANK8) is using the same PTH0510w,but there is nothing wrong of Vccio (BANK7 and BANK8) .

    what i can't understand is Vccio(BANK7 and BANK8) is ok, whlie Vccpt is short-circuited with GND, if there is something wrong of the power supply(PTH0510w).

    --- Quote End ---

    If I understand your description; you have removed the bead to VCCPT and powered the board, and VCCIO is correctly powered. If that is the case, then the power supply is fine. The problem is related to the VCCPT on the FPGA.

    --- Quote Start ---

    And what i want to know is if there is something wrong about the FPGA itself,before the first configuration.it's so expensive,and should not be so fragile.

    --- Quote End ---

    It does sound like the FPGA has been damaged in some way.

    Could you please measure the power-on waveforms from the power controller. Perhaps it has some over-shoot on startup that exceeds the maximum voltage of the VCCPT power rail (as FvM suggested).

    The problem with using a power module is that you have no control of the controller feedback loop. If you have put too much capacitance on the supply output, you may have changed the controller loop dynamics. Did you follow the power module recommendations for decoupling, or use more?

    Cheers,

    Dave