ContributorCan't compile example Cyclone10 GX projects in Quartus Prime 23.1 Pro
To get off the ground with my shiny, new (and expensive) Cyclone 10 GX development board I went to https://www.intel.com/content/www/us/en/design-example/714945/cyclone-10-gx-pcie-gen2-x4-dma.html and downloaded the .par file. Quartus 23.1 was happy to open it and wanted to run an IP upgrade, which also ran.
However, compiling falls over with the error:
Error(19021): The same file name "top_hw" is used for different IP files. The same name cannot be used for more than one IP file. Only directly include the .ip file, not the .qip or .qsys.
Error(22175): file: "C:/Users/olivers/Documents/sbsvn/Client/misc/GXexamples/Cyclone10GX_PCIeGen2x4_DMA_18_0_project/platform/top_hw.qsys"
Error(22175): file: "C:/Users/olivers/Documents/sbsvn/Client/misc/GXexamples/Cyclone10GX_PCIeGen2x4_DMA_18_0_project/platform/top_hw/top_hw.qip"
If I remove the QIP then compilation crashes the Quartus fitter.
Any suggestions?
Hi Oliver,
I don't see any report. However I am recalling a known issue, do you receive the same Internal Error: Internal Error: Sub-system: DCALC, File: /quartus/ddb/dcalc/dcalc_bcm_modules_cache.cpp, Line: 176Could not load pdb file - e:/quartus/quartusprimepro23.1_installed/devices/20nm/ddb_nightfury_timing_corner_db
Do you have only Cyclone 10 GX device installed? If yes, the current workaround in 23.1 is to install Arria 10 device, or you may use 22.4 instead.
Regards,
Nurina
