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Altera_Forum
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16 years ago

Can I use ALTPLL in Cyclone II in this way?

The clock in my project is transmitting by LVDS. Can I use ALTPLL in Cyclone II in this way : I connect clk+ to LVDSCLK0p, clk- to LVDSCLK0n, then I use a ALTPLL in my design, its output c0 co...
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Altera_Forum
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16 years ago

o! thanks a lot. I got it. This information is so useful!

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When Cyclone II dedicated clock input pins are configured for the LVDS or LVPECL I/O standard for input operations, the differential buffer is powered by VCCINT, not VCCIO. Thus, the VCCIO does not have to be 2.5V when you use LVDS or LVPECL I/O standards on the dedicated clock input pins for input operations.

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