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However, as the current layout stands it is inconvenient to send the VCCA plane to the jtag connector. It is far more convenient to have a small local 2.5V linear regulator instead (I have a nice little spot for it). I understand that the reason for the 2.5V instead of VCCIO (which is 3.3V in this case) it to get farther away from the 4.1V overshoot (not sure why not just install the clamping diodes to VCCIO instead of using the VCCA PLL supply).
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I completely agree with your analysis. You MUST observe the FPGA maximum ratings. If you achieve it e.g. by JTAG clamp diodes, it's O.K. as well. Up to now, I'm using 3.3V JTAG for all Cyclone I to IV devices, with respective protection means.
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