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Yes, we used the TerASIC Quad Link LVDS HSMC board to interface to a CameraLink camera. The camera used the Base configuration so it was easy enough to adapt the Base configuration to standard 27 bit parallel video format accepted by the Clocked Video Input module in the VIP suite. However, the camera was transmitting in Bayer format so we had to develop a Bayer filter to put inline.
Do you have the CameraLink spec? If not, it should be easy enough to find it on the web.
Things you'll want to know:
* Is it using a Base, Medium or Full CameraLink configuration. This should be apparent by the number of 26 pin MDR connectors/cables on the camera.
* What data format is the camera transmitting? Color? Monochrome? Bayer?
Good luck.
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Is it possible to interfacing base CameraLink, color line scan camera to the fpga with CLR-HSMC daughter board?
If im interfacing 2 cameras at a time what is the performance?
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