Honored Contributor
Honored ContributorDanVet
If you want a rule of thumb for guessing then here's mine: Sketch out your design very roughly and do a rough calculation based on what you think will be in it: e.g. 16 bit counter - 16 LEs 32 bit shift register - 32 LEs Add say 30% because of all the bits you missed - all the little lumps of logic that glue all these bits together that you didn't think of at the time but suddenly appear along the way and mount up. (Also requirements will almost certainly change and you'll have to add a few bits because it doesn't quite work how you thought it would). Add all of this together and aim to come in under 80% of the chip. Use this as a risk management guess only - don't make any assumptions on it. I would say this works reasonably well for designs where area is more important than speed - e.g. if speed is a serious requirement then aim to use up less than 80% of the chip. Other people may well reply and say this is a load of dingo's kidneys and they will be perfectly right in doing so - it is only a rule of thumb that I have used in the past to get a very rough idea of logic requirements - don't spend money based on this! Basically this is a risk and you need to manage it as so: 1) Regularly synthesise / place and route your design as it develops so you get an early a warning as possible if you're starting to get a bit big. 2) Early on in the project, make sure you identify space and device choice as a project risk to the project manager - don't keep it to yourself and hope it works out. As somebody else said, the best tool in estimating design size is experience and even with experience I would say it's still a bit of a stab in the dark. Hope this helps.
