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Altera_Forum
Honored Contributor
Honored ContributorCalculating jitter
I see a PLL output jitter spec of 25mUI for clocks less than 100MHz. Does anyone know how to calculate the output jitter with this spec?
Altera_ForumHonored Contributor
Honored Contributor25x10ˆ-3 (10ns) = 250ps
Where 10ns is the period of the clock you are using.
