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DeanK77's avatar
DeanK77
Icon for New Contributor rankNew Contributor
2 years ago

C10 GX Passive parallel configuration issue, not using PFL module

I have a PCBA that is setup in the following manner with the D[7:0] not going through the CPLD but rather is in a "flyby" type configuration. The FPGA (C10 GX) FPGA code has a Nios in it that runs f...
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Farabi_Altera's avatar
Farabi_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello,


I am returning this case back to community. If you have new question, please raise new ticket, we will be happy to support.


regards,

Farabi