Building RBF with SOF and ELF, External SDRAM

My need is similar to yours Kirshna, The reason I'm using SDRAM is because the program is too big for on-chip RAM. Using nios2-download, I end up with the elf image running in SDRAM. So, what is the "magic" that allows this to work? If that can be duplicated in a stand-alone situation, then the problem is solved.

the fundamental question is what is Altera's recommendation for users who need to have the CPU on the board with the FPGA load the FPGA pattern and the nios elf image from files accessible to the CPU. Is it really such a big issue that the nios runs from SDRAM? This means that the FPGA load image can be upgraded in the field. This seems like a common need. We are not trying to do something out of the ordinary. What is the "offical" Altera solution?