Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorBug in Quartus II (BDFs + Verilog Parameters)
In Quartus II (11 at the moment, not tried other versions), when updating parameters from within the verilog file and re-creating the symbol file, then updating symbol file in the BDF, the parameters in the BDF do not change.
Just spent a few minutes looking for a bug, before realizing this is the case. Would be useful if it automatically updated the included parameters too!4 Replies
Altera_ForumI would expect a change the default parameter to change the BDF initialistation after updating the symbol.
- Altera_Forum
If a default parameter value has been overridden in the instantiation, I would not expect a subsequent change of the default parameter value to change the overridden value in the instantiation.
If you are talking about something else, you may need to clarify. - Altera_Forum
The instantiation parameters in the BDF do not change, which would be the expected behavior of updating the symbol.
- Altera_Forum--- Quote Start --- the parameters in the BDF do not change --- Quote End --- Which parameters to you mean? The module's defpars or the actual values of the instantiation? It's many years, that I've been using schematic entry for designs, but I guess you would want the instance parameter to be kept, as in a HDL module respectively component instantiation?
