Forum Discussion
New ContributorBoundary scan access to SDM pins on Agilex 7
In the Agilex 7 BSDL files available from the Altera website, all of the SDM pins are marked as 'Linkage' indicating that there is no boundary access or control of them. However, from some early investigations on the DK-SI-AGF014EB Development Kit it seems that boundary scan can be used to read and control at least some of these signals (so far I’ve tried SDM_IO5, SDM_IO7, and SDM_IO9).
Please can you clarify why this functionality isn't included in the supplied BSDL files, and whether there is a way to obtain BSDL files which include this information?
1 Reply
Ash_R_AlteraRegular Contributor
Hi,
The SDM_IO pins are implemented with boundary-scan circuitry in Agilex 7 devices. However, the standard public BSDL models classify the SDM pins as Linkage, so general-purpose customer boundary-scan tools do not treat them as controllable or observable cells. This is intentional because these pins have configuration-specific behavior, including MSEL sampling during power-up, and are not released in the public BSDL as ordinary user I/O.
Your observation on SDM_IO5, SDM_IO7, and SDM_IO9 is consistent with the underlying SDM boundary-scan implementation.
Regards,
Altera Tech Support
