Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- Yes I am aware that this is an Altera group and since I know very little about Altera boards, I thought someone proficient in it could help me out in the recommendation for a suitable Altera board, if available! --- Quote End --- There will be a suitable board ... but first lets figure out what you really want to do. --- Quote Start --- The problem with using a PLL to boost the frequency is also short sighted for my project because I need to generate an MLBS of at least 60 MHz i.e. 60MHz and above until probably 120MHz. Then I also need to generate a carrier signal of say 200Mhz, modulate my MLBS onto the carrier and then get the resulting signal from an output pin. All this needs to be done on the same FPGA board thereby removing the necessity to use two different hardware for generation of the MLBS and then another for the carrier signal and their modulation. So, can it be done??? --- Quote End --- Yes, but what you need to clarify your description a little. 'Modulation' can mean two things; 1) A PRBS pattern can 'modulate' a digital data stream over a digital data link, eg., a high-speed transceiver, to ensure that data has enough transitions for the CDR at the receiver to operate in lock-to-data mode. 2) You want to multiply the PRBS sequence by an in-phase and quadrature sinusoid to generate a PRBS sequence relative to a carrier. You'd transmit that to a DAC, receive the response with an ADC, and correlate the signal looking for the peak in the response. And I am sure there are other interpretations. So what is it you are really trying to do? Do you need a board with ADCs/DACs? Your statement about generating a PRBS at 60MHz and above is also ambiguous. A PRBS generates a wideband signal, so it inherently generates frequency components from 60MHz and above, in fact it generates signal from DC to infinity (multiplied by the sinc response of your output clock rate). Or did you just mean clock rate? The PLLs are programmable, so you can reconfigure the PLL from 60MHz to 120MHz dynamically, or synthesize two different designs. Cheers, Dave