Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThanks a lot for that document on shift registers and Pseudo random sequences. Although I do know quite a bit about MLBS per se, the document helped me visualize the FPGA coding aspect better. Thank you for that!
--- Quote Start --- This is an Altera group, not a Xilinx group, you'll have to ask for help with your board elsewhere. --- Quote End --- Yes I am aware that this is an Altera group and since I know very little about Altera boards, I thought someone proficient in it could help me out in the recommendation for a suitable Altera board, if available! The problem with using a PLL to boost the frequency is also short sighted for my project because I need to generate an MLBS of at least 60 MHz i.e. 60MHz and above until probably 120MHz. Then I also need to generate a carrier signal of say 200Mhz, modulate my MLBS onto the carrier and then get the resulting signal from an output pin. All this needs to be done on the same FPGA board thereby removing the necessity to use two different hardware for generation of the MLBS and then another for the carrier signal and their modulation. So, can it be done???