Forum Discussion
Altera_Forum
Honored Contributor
10 years agoA lot of people like Verilog because of its similarities with C, but that makes people fall into the programming trap, rather than trying to describe hardware. VHDL annoys people because of it's strong typing, but this clears a lot of errors that the Verilog compiler will allow and you'll only notice when your code doesnt work properly.
Either way, you're describing the same hardware. Once you understand one language, the other is easier to understand/write.