Forum Discussion
Altera_Forum
Honored Contributor
10 years agoOK - I'm slowly learning HDL. The confusing thing at the moment is that there seem to be multiple options, and I don't really want to have to learn all of AHDL, VHDL & Verilog...
I actually have an address decoder already (written out in logic gates ;-), but the HDL way seems better). In my old discrete logic way of doing things, I'd have used the address decoder to enable the relevant tristate output onto the bus, but I don't seem to be able to do that with the FPGA. Once I have an address decoder, do I then do what I thought I'd have to do with and/or gates, or use something like a multiplexer, or is there a better way?