Bidirectional bus - noob question

There is probably where writing some HDL is going to be a massive life saver. For this you need an address decoder, which in HDL would be something like this:

--turn everything off unless decoded.
reg_en <= '0';
sram_en <= '0';
temp_sensor_en <= '0';
case cpu_addr(7 downto 4) is
    when x"0" =>
        --access some registers
        reg_en <= '1';
    
    when x"1" => 
        sram_en <= '1';
        
    when x"2" =>
        temp_sensor_en <= '1';
        
    ----etc

I wouldnt want to write that out in logic gates. Let the synthesisor do the work for you.

If you insist on schematics, you can use lpm_compare blocks and lpm_constants for the values. Extract the bits out of the address bus to decode into individual enables.