beginning with CPLD's

Hmm to bad, i was hoping to fit an CPLD, jtag header and a crystal on a MBED size board.

(i would link an image to an MBED here but i cant, need 5 posts first, if you dont know it, google it :D)

But making that single layer is impossible it seems

I'll go for an arduino sized PCB then and imma use my awesome dual layer technique.

Making 2 single layer PCB's and glue them together as i can only etch single layers at home.

Don't worry, if the prototype works I'll make some professional.

For the decoupling caps, is 1 cap per side (4 total) enough, 100nF caps?

Or do i need to add tantalum caps to?

Little question about the crystal, as the I/O pins are 5V tolerant, can i use a normal 5V crystal?

I am planning on just making a schematic with logic blocks and upload it in the CPLD.

So connect the crystal to 2 random I/O ports and then make a multiplier/divider and just select the 2 I/O pins as input for them?

Or do i need to connect the crystal to specified pins?

Thanks for the help,

Rik