Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

beginning with CPLD's

hello. I want to start with CPLD's like the title said, but i have absolutely 0 experience with them. I ordered an Altera USB blaster and i am designing a CPLD board. I am going to start wi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

The JTAG interface should have a TCK pull-down and TMS/TDI pull-up resistors. All supply pins have to be connected, bypass capacitors are required in addition. The clock input should be connected to a 3.3V crystal oscillator.

Feasibility of a single layer board depends on what you are connecting to the CPLD inputs. It's difficult anyway. Insufficient ground connection can e.g. cause double clocking through ringing clock signals or failure of the JTAG interface.