Forum Discussion
Altera_Forum
Honored Contributor
15 years agoBCD counter vhdl code
I am a newbie quartus user.. please help me thanks http://i54.tinypic.com/2zp2p3p.png This is my written code: library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; e...
Altera_Forum
Honored Contributor
15 years agoI told the reason for load not working in my previous post. Read it again. Or follow the above suggestion, but the waveform would be slightly different from the reference.
Also the led output is coming one cycle too soon, and with wrong polarity compared to the reference waveform. I also told a suggestion for this point. --- Quote Start --- But you have twice "count_sig <= count_sig + 1;" in the code. But i don't think thats gonna affect the process. --- Quote End --- Right, only the last assignment in a process wins, this property is also utilized for the load case. But the double assignment should be removed for clarity.