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c-thaler's avatar
c-thaler
Icon for Occasional Contributor rankOccasional Contributor
3 months ago

AXI violation on H2F interface of S10

I'm using the H2F AXI interface to access external RAM via EMIF on an S10 SX SoC DK (1SX280HU2F50E1VGAS). There are situations where I see the valid signal of the W channel go from 1 to 0 while th...
Core Logic
c-thaler's avatar
c-thaler
Icon for Occasional Contributor rankOccasional Contributor
2 months ago

Hi Kian,

thanks for the reply.
DQ width in my case is 64. Therefore I think this does not apply to my case.
And the HPS can access the EMIF successfully for quite a while before it hangs.

H2F data widht is 128 while EMIF Avalon width is 512.

Best regards
Chris

KianHinT_altera's avatar
KianHinT_altera
Icon for Frequent Contributor rankFrequent Contributor
1 month ago

Hi Chris,

As this thread been idling for quite some time, I will step back and allow the community to assist with any future follow-up questions.

Thank you for engaging with us!

Best regards,
Altera Technical Support