Forum Discussion

Occasional Contributor

1 month ago

AXI violation on H2F interface of S10

I'm using the H2F AXI interface to access external RAM via EMIF on an S10 SX SoC DK (1SX280HU2F50E1VGAS). There are situations where I see the valid signal of the W channel go from 1 to 0 while th...

Core Logic

KianHinT_altera

Frequent Contributor

1 month ago

Hi,

The closest errata I could find is this

https://docs.altera.com/r/docs/683399/current/stratix-10-sx-device-errata/hps-stops-on-the-first-read-request-to-sdram

Could you check in your design whether it hits into the area that the errata mentioned?

Also may I know whether the H2F data width matches with the EMIF AXI width?

Thanks

Regards

Kian

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AXI violation on H2F interface of S10

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