Avalon-ST - How to get the Available credit for Posted request?

I have couple of question/issues w.r.t the Avalon-ST credit management -

1) Available credit for Posted request - what is the suggested way to could control our posted requests launching based on the available credit ?

Based on the "Stratix V Avalon-ST Interface" the TX Posted data/header credit signal ( tx_cred_datafcp/tx_cred_hdrfcp ) is a credit limit ( limit stands for a static signal which only indicate the max number of credit that can be used ? ) .

http://www.altera.com/literature/ug/ug_s5_pcie_avst.pdf

Based on the "IP Compiler for PCI Express" the TX datapath provides a TX credit vector which reflects the number of available credits .

On the Avalon there is not such an interface. Can the application layer get this signal as a side band directly from the hard IP ?

http://www.altera.com/literature/ug/ug_pci_express.pdf

Based on an Example on Altera web the tx_cred_datafcp/tx_cred_hdrfcp on the Avalon interface are actually dynamic , but are inceasing when the application consume credit. So if its an "consume counter" , how can i know the credit limit?

http://www.alterawiki.com/wiki/how_credit_works_in_stratix_v_pcie_g3x1_reference_design

2) Hard IP consumes a credit (w/ Multyple packets per cycle) -

On the 256-bit Avalon-ST we can send/receive 2 packets each cycle . Is the Hard IP can consume more then 1 header/data each cycle ?

On the Avalon description of the tx_cred_fchipcons bus , it says it can only consume one per cycle.

"During a single cycle, the IP core can consume either a single header

credit or both a header and a data credit."

Thanks