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Altera_Forum's avatar
Altera_Forum
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19 years ago

Avalon Slave Port

Hello to all,

I have a Stratix II dev Kit and I made a design with a Nios II, an onchip memory, a tristate bridge and a custom "Typical Avalon MM-Slave" added with the template on SOPC Builder 7.2 and changed the standard interface with the tristate one.

Inside Quartus II 7.2, Pin Planner I associated the 7 bit data bus output pin of my device to my devboard leds pins (AD26, AD25, AC25, AC24, AB24, AB23, AB26, AB25). Then I compiled and programmed the FPGA.

Inside Nios II 7.2 I created an Hello_Led template based project and I changed the writing on led of pio (IOWR_ALTERA_AVALON_PIO_DATA(LED_PIO_BASE, led)) with one relative to my custom device (IOWR(MY_AV_SLAVE_INST_BASE,0,led)).

Leds don't flash, and I also can't find out how to manage signals of my device like chip_select or write_n, the only lines I can see in system.h are:

# define MY_AV_SLAVE_INST_NAME "/dev/my_av_slave_inst"

# define MY_AV_SLAVE_INST_TYPE "my_av_slave"

# define MY_AV_SLAVE_INST_BASE 0x00021100

# define MY_AV_SLAVE_INST_SPAN 256

# define ALT_MODULE_CLASS_my_av_slave_inst my_av_slave

I think there's something wrong, but I can't find the solution within the documentation.

Thanks a lot,

Dave

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    Hello sealab,

    1) I'm Not sure to understand why you want to use chip_select and write_n signals. Your custom peripheral should not handle these signals if you only need to drive Leds. Remove it from "component editor" if you don't need it (I assume these signals have been added by the template you've chosen).

    2) Did you create your component with your own HDL file(s) or w/o any file (just interface signals)? Because there is a bug on the 7.2 where interface signals are not exported to the top level entity! (Topic on this bug: http://www.niosforum.com/pages/forum.php?cat_id=5)

    Anyway, if you send me a picture of your SOPC system and your graphical design top level design with your inputs/ouputs signals (under quartusII) maybe I could give you more help.

    Regards.

    -Pierre
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    19 years ago

    Thanks for your answer,

    my real intent is not to flashing leds, what I need is to put out from the FPGA some signal in a tristate way. I actually use leds to test the port.

    http://farm3.static.flickr.com/2061/2056994755_ccb1ab4b83_o.jpg

    As I said writing on port (that I created w/o any file) doesn't give any result.

    I don't think that IOWR(MY_AV_SLAVE_INST_BASE,0,led) is the correct way to send data to my peripheral..

    Thank you very much,

    Dave